Design And Optimization Of Arithmetic And Logical Unit In 90nm Technology

Integer arithmetic logic unit (ALU) is one of the core computing components in high-performance microprocessor; its performance has great effect on the entire micro-processor. It's important and valuable that research on optimized design and implemen-tation of high-performance, in the 90nm technology and below.Firstly, the arithmetic and logic unit of the X high performance processor is studied and analyzed deeply. Employing the mix static timing analysis method makes the exact timing restriction for design compiler. According to the result of design compiler, the performance of each module is analyzed. The modules that need to be full-custom de-signed are made by finding the key path of the ALU.Secondly, an improved Pseudo-Ling sparse-tree which combines the advantage of sparse-tree and Ling arithmetic is put forwarded. Circuit structure design and perform-ance analysis for updated carry tree characteristic is done. The result of circuit simula-tion shows that the delay of the updated 64-bit adder circuit is 300ps.Finally, custom layout design for the improved 64-bit adder in the 90nm technol-ogy is done. Several effective means are employed to optimize the parasite parameter effect of RC delay, cross-talk and IR Drop, and that improves the performance of 64-bit adder. The result of Hspice simulation shows that the area of adder's layout is 100μm×56μm, and the delay of the adder 590ps.In this paper, the methods of Semi-custom and Full-custom mixed design is em-ployed, and designed and optimized in several aspects as the code, logic structure, cir-cuit and layout, improving the performance of the ALU. All above design and optimiza-tion makes finally ALU run at 1.2GHz frequency.The contribution of the paper will be used in the practical project.