The Coverage-driven Verification Technology Based On IIP Module

With the increasement of ASIC scale and complexity, verificaiton has become one of the major bottlenecks in the design process. How to low down the verification time, as well as guarantee of verification completeness are main problems facing.Therefor, taking the verification of IIP module in grouping transmission chip for example, this thesis represents focused on how to find the balance point between the verification quality and the cost time in the basis of Coverage Driven Verification methodology, and elaborates the random verification process based on the coverage and the building of the verification environment, proposing to guarantee the verification completeness and measurement in both sides of the code coverage and functional coverage.Including the verification of IIP in this thesis, the verification process of the chip has already been completed and the test which uses the hardware FPGA board also proves that the chip is well-operatd and about to be taped out, which also has an useful reference significance for the next version and some other related chips in the verification methodology. The practice experience in this thesis can improve the verification quality, reduce the development cost and shorten the research cycle.