The Verification Of PMIC Vibra Digital Module Based On UVM

With the rapdily development of the IC,the complexity of design and verification is more and more difficulty.Therefore,high efficiency of verification,less engineering resources and great performance of project quality have been great significance for digital integrated circuit industry.How to build a quality verification platform faster,which has the feature of flexible,high degree of automation and reusability,is important to this industry.The focus of this thesis is to build a verification platform and to verify the module function for the digital module of mobile vibration control(Vibra)module,which belongs to the power management chip.Through the ayalysis of the design specification of the Vibra digital module,the function of each component has been clarified.Working point as follow,Firstly,the reference model corresponding to the DUT is written by System Verilog verification language.Secondly,according to flexibility and reusability of the UVM verification method,the Orab bus model(agent)and its corresponding package are reused in top environment,which is more suitable for the actual situation of project and reduces the time for platform building.Thirdly,the verification strategy and test item.is developed by analysising the functional points.Lastly,according to the class type of the DUT,using SVA to verify the function correctness of validated module.This paper has built up a testbench for Vibra digital module based on UVM method,and combining with assertion and coverage-driven as a way to verify.The results show that the number of assertion hit 74 times,assertion miss is 0 times,code coverage rate and functional coverage rate are 97% and 100%,have reached the engineering standards.Practice has proved that the platform with the character of automatic data comparison,real-time reporting error information,reusable and so on,which effectively improve the verification efficiency and enhance the integrity of the verification.