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Register Transfer Level Coverage-Driven Verification Of External Memory Interface

Posted on:2007-09-24Degree:MasterType:Thesis
Country:ChinaCandidate:J JinFull Text:PDF
GTID:2178360212465426Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the great development of the Embedded System, the SoC (System on Chip) has been used more and more widely.Most of the SoC chips include the External Memory Interface (named EMI). EMI is a bridge between the microprocessor and external memory, whose function and performance decide the type of the external memory supported by the embedded microprocessor and the speed of accessing to the external memory, thus also effect on the speed of the whole system. The EMI on the system chip"Garfield"discussed in the dissertation supports many kinds of external memories which include RAM,ROM,Nor Flash,SDRAM and Nand Flash, so the efficient functional verification is especially important. Verification is probably the most difficult and important aspect of SoC design. It is the only opportunity to find conceptual, functional, and implementation errors before the design is committed to silicon. How to implementation the verification platform to achieve the success of functional verification quickly and efficiently is one of the hot points in design and verification fields. The difficulties of functional verification are manifested in the aspects as follows: the fast autogeneration of test vectors, the extensiblilty of test bench, the evaluation of the quility of verification and regression test.This dissertation is part of the"Garfield"system chip design. It mainly discusses the function and verification of memory controller in the"Garfiled"system. The main task of author is the design and implement of RTL level functional verification platform for the EMI of Garfield, which based CDV (Coverage-Driven-Verification) flow. The research result has been successfully used in functional verification of the EMI in Garfield.The research of this dissertation mainly includes:1. On the basis of sufficient analysis of architecture of Garfield, discusses the saturs and function of EMI on the"Garfield"and the architecture of design .comprehensively masters the design priciples, implemental methods,functions,performance and characteristic of the EMI on the Garfield and estabilishes detailed verification plan according to the functional specification of EMI.2. On the basis of sufficient analysis of various kinds of functional verification methods and tools popular nowadays, establishs verification flow based on coverage drive using the Specman as the verification platform, the author uses the E language which is a kind of verification language supported by Specman Elite to design and implement RTL level CDV environment of EMI according to the system architeture's features of EMI.3. This design of CDV verification environment has been used in the EMI on the Garfield system chip successfully and evaluate and anaysis the result of verificatition and summarization of the verification result. In the ADS debug environment——IDE,which based on ARM,by developing it's driver and test program, the EMI is tested and validated.
Keywords/Search Tags:EMI, Extensibility, Coverage-Driven-Verification, Constraint-Random Testbench, Validation
PDF Full Text Request
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