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Research And Design Of High-speed Frequency Dividers For OFDM UWB System

Posted on:2010-09-24Degree:MasterType:Thesis
Country:ChinaCandidate:J W YinFull Text:PDF
GTID:2178360275992272Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The prospect of wireless date transmission at rates of hundreds of Mbps has drawn much attention from both academy and industry to the UWB system.Proposed by multi-band OFDM alliance(MBOA),the entire UWB spectrum(from 3.1 to 10.6GHz) is divided into 14 channels(bands) with a spacing of 528MHz.Usually,frequency synthesizers are employed in UWB transceivers to generate carriers for frequency hopping between different bands.In phase locked loop(PLL)-based frequency synthesizer(FS),the frequency divider(FD) is one of the most important building blocks.Especially for the first stage of divider,it consumes a significant amount of power since it operating at the highest frequency in the loop.More importantly,the power consumption of FD will grow drastically with the increments of operating frequency.Reducing power consumption of the FD is,therefore,a critical issue in modern commercial portable battery supplied equipments.It remains a challenging task to design high frequency dividers with low power dissipation.The main focus of this thesis is the research of high-speed FDs for UWB systems.Firstly,a comprehensive summary and comparisions of current frequency dividison techniques are presented,which contains the operating principles,both advantages and disadvantages in performance and circutry realization.Secondly,for the FS in UWB 'Mode One' system,this thesis presents the design of a divider chain with division ratio of 176 from 4.224GHz to 24MHz in Jazz 0.18-um RF CMOS.This divider chain contains four stages of source-coupled-logic(SCL) FDs,one TSPC divide-by-two and one divide-by-11 digital FDs.Supplied by a 1.8V power,the divider chain consumes 9.5mA of current.The measurement results show that this divider chain can work stably for the FS which can successfully locked to the targeting frequencies.Finally,for the high band groups of UWB,this thesis presents an injection-locked Frequency divider(ILFD) implemented in Jazz 0.18-um RF CMOS technology.With the help of the innovation in the way of injection and the application of traditional tuning methods,this ILFD achieves a breakthrough in the key performance of locking range (6.23-11.08GHz) with low power consumption.The core circuit of the ILFD consumes only 3.7mA from a 1.8V power supply,The wide locking range combined with low power consumption brings the ILFD large potential for its application in the high band groups of UWB system.
Keywords/Search Tags:UWB, Frequency Synthesizer, Frequency Divider, ILFD
PDF Full Text Request
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