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Research On Low Power Dynamically Reconfigurable Cache Based On Tournament Caching

Posted on:2010-05-14Degree:MasterType:Thesis
Country:ChinaCandidate:X K SuFull Text:PDF
GTID:2178360275482002Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
In modern computer system architecture,CPU'S speed is much faster than the memory.Cache is a classical technique for speed up the data access.It can bridge gap between high-speed processors and low-speed main memory.It has applied in many aspects of computer technique,but high performance Cache dissipates significant energy of CPU.The research of high performance and low power Cache has significant means for the computer system,especially for the embedded system.The thesis makes a deep investigation into Cache low-power technology of Embedded System from the perspective of dynamicly reconfigurable , followed by analyzing the shortcomings of existing Cache technology of high performance and low power, and then focuses on Tournament Caching,a Cache design technology of dynamicly reconfigurable. On this basis,we propose two Cache model of low power dynamicly reconfigurable.Indefinite Way Changing Cache with Tournament Caching is first proposed for L1 I-Cache,the Cache mode optimized the scheduling strategy of Tournament Caching and can change the associate degree of Cache between 1,2 or 4 when the Cache is running,it can fastly adapt to the optimal Cache parameters needs of program run-time,so it can further reduce the power consumption of Cache.The other Cache model is Fast Adaptive Cache with Tournament Caching for L2 Cache,the Cache model based on the features of larger capacity and more power consumption of L2 Cache and combinated the advantages of Indefinite Way Changing Cache,comparing to traditional set-associate Cache,it can significantly reduce the power consumption of Cache.In this thesis,we built a simulation platform using simulation tools of Wattch and embedded in the dynamicly Reconfigurable Cache model. In the ARM instruction set, simulated the benchmark of Mibench. The experimental results show that comparing to Tourname Caching, Indefinite Way Changing Cache with Tournament Caching can further reduce 20 percent of average power consumption, while the delay is only an increase of 0.6% and comparing to traditional set-associate Cache,the Fast Adaptive Cache with Tournament Caching can nearly reduce 50 percent of average power consumption,while the delay is only an increase of 0.57%.
Keywords/Search Tags:Lower power, dynamicly reconfigurable, Cache, Infinite way changing, Fast adaptive
PDF Full Text Request
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