The Research On Design Methodology Of System Bus IP Core In 8086 Computer-on-a-Chip

Computer-on-a-Chip (CoC) integrates ICs which distributed on the personal computer mainboard into one chip as many as possible , featuring better performance, lighter weight, smaller volume and lower power consumption. Integrating system bus into the CoC has lots of positive meaning for reducing chip area, simplifying system structure and expanding peripheral IPs. The research in this dissertation is based on the project of the 8086 Computer-on-a-Chip. Based on the IP/SoC design methodology, this dissertation studies the integration bwetten Chip-On-Board (COB) and On-Chip Bus ,designs system bus IP Core for CoC .Then, the integration and verification of this IP is performed on 8086 Computer-on-a-Chip platform.The main works and achievements of this dissertation are as follows:1. Developing an IP for the AHB Bus, which is working with 8086 CPU together;2. Developing an interface between 8086 CPU and AHB Bus;3. Completing the RTL-level design of several major functional modules, including Arbiter module, Interrupt module, and decoder module, etc;4. Building an 8086 Computer-on-a-Chip simulation platform. Completing RTL-level simulation of this system bus IP Core by electronic clock and VGA experiments designed;5. The whole system FPGA prototype verification is performed on the Altera DE2 evaluation board. The results show that this system bus IP is well designed and stable.