Implementation And Optimization Of MPEG-4 Video Compression Arithmetic Based On DSP

Along with the development of technology and business in modern times,multimedia terminals have been becoming more and more popular. Video compressioncoding/decoding technology is the foundation of multimedia applications, and is thepivotal module for constructing multimedia system.Standardization organizations like ISO/IEC have advanced a lot of imagecompression standards such as JPEG2000, H.26X, MPEG-X and so on. MPEG-4 is oneof the new video compress standards issued by ISO/IEC.It's preferable compressperformance make it can be used in video applications need high quality and low bitrates. In addition,it is less complicated compared with standards newfangled such asH.264/AVC, make it easier be implemented in embedded multimedia applications.Onthe other hand,as the fast development of the digital signal process, the capability ofmicroprocessor is greatly advanced. And this makes the implement of embeddedmultimedia products to be possible. Real-time encoding for video compression isalways achieved by hardwares appropriative rather than general pursose processors, it isbecause the encoder is more complex than the decoder. BF561 is one of the generalpurpose processors can be used in Real-time encoding.This paper is mainly researched on the accomplishment and optimization ofMPEG-4 video compression technology standard based on BF561.In this paper wediscuss the framework of accomplishing embedded multimedia applications, futhermore, we study the build of the algorithm. In regard to the module with morecomplexity or with more compute demand, we apply a lot of optimization especial,which gain apparent benefits.