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Research And Implementation Of The H.264 Encoder Based On BF561

Posted on:2015-01-19Degree:MasterType:Thesis
Country:ChinaCandidate:J C WangFull Text:PDF
GTID:2308330464968041Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the rapid development of multimedia technology, streaming media technology, and microelectronics technology, and the increasing integration of video images, sound and network technologies, smart terminal equipment continues to emerge, which has a profound impact on our lives. Smart terminal refers to intelligent devices with multimedia and streaming media processing functions, including smart phones, SMART-TV, video conferencing systems, intelligent monitoring, smart set-top boxes, tablet computers, smart cameras, smart car electronics, smart PDA, smart phones and so on. These smart devices include a core technology called digital video technology. Digital video technology is mainly based on video coding algorithms, and the technology has been used in the field of communications, computers, etc. Due to the widespread use of the digital video technology, there are more video coding standards.DSP not only has high-performance digital signal processing capabilities, but also can quickly achieve a variety of digital signal processing algorithms in the real-time digital signal processing. Besides the development and upgrades of DSP are relatively easy, and the cost is low. DSP having so many advantages makes it playing an increasingly important role in the field of video compression. Especially BF561, on the one hand, contains two Blackfin processor cores, on the other hand also has a flexible caching architecture. In addition, BF561 also features an enhanced direct memory access(DMA) subsystem capable of completing complex control and signal processing tasks very conveniently in the case of maintaining high data throughput.A high-definition video encoding and transmission system is designed and studied in this paper based on BF561, and the cross-platform transplantation of H.264 encoder x264 is implemented. The method of optimization work from the characteristics of processor hardware resources and code is mainly studied, which successfully improves the H.264 encoder coding performance. System hardware is mainly composed of the video coding module, the video pre-processing module, the memory module and the video transmission module. One of the most important modules is the video coding module which completes video compression algorithms based on H.264 in BF561 platform. The video pre-processing module mainly analyses and studies the simulation and analytical work of high-definition video based on CML protocol video image format; the video source generated by this module can be used as the video input of the video coding module, so that the encoder performance testing is easier. Because the x264 encoder cannot run on the Visual DSP++ platform directly, so this paper conducts a targeted transplantation and optimization for the hardware resources of the adopted embedded processor platform BF561 and the content of software algorithms supported by the software development environment Visual DSP++ in the process of implementation. After the test, the run rate of optimized H.264 encoder is increased evidently, and compressed images have higher quality assurance.
Keywords/Search Tags:Video coding, H.264, BF561, Optimization
PDF Full Text Request
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