Based On The Adsp-bf561, Avs Video Algorithm And Implementation

Nowadays, Video codec technology plays a vital role in the fields of IPTV, Digital TV, video telephony and digital video conferencing and other multimedia signal processing. AVS (Audio Video coding Standard) video standard is developed by the Audio Video Coding Standard China's Working Group of China (AVS working group for short), which was approved by the Chinese Science and Technology Department of Ministry of Information Industry. The establishment of Audio Video Coding Standard is developed with independent intellectual property rights of second-generation source coding standard. AVS video standard has the following advantages, such as low complexity, high-performance, low-cost and easy licensing model. Researching AVS video algorithms, designing of the software decoder based on DSP platform and implementing the error concealment algorithms on video decoder terminal will greatly promote the development of AVS standard, and further push forward the process of industrialization of AVS. This paper is raised against this background.The paper is mainly consist of three parts: designing and manufacturing the embedded hardware platform which is to Aid's ADSP-BF561 as the core; AVS video codec algorithm researching and implementing based on the ADSP-BF561; error concealment algorithm researching based on AVS video decoder terminal.First, the paper introduces the basic thought and theories of video codec standards and studies the key technologies and features of the AVS video standard deeply. And then to learn more about the structural characteristics of the digital signal processor in Blackfin family, design and produce an embedded hardware platform which is to Aid's ADSP-BF561 as the core. Used the Visual DSP integrated development environment to transplant and optimize the AVS decoding software on the ADSP-BF561 platform. AVS decoder optimization is the key research topics, including compilers, memory, compilation commands optimization techniques; in allusion to the features of embedded platform, the fasting algorithm of sample interpolation is proposed, sample interpolation is one of bottlenecks which impact on the decoder speed most seriously, the algorithm improved the execution efficiency of motion compensation part. The experimental results show that the AVS codec for D1-definition video images basically meet the requirements of real-time decoding.Another work is the research on error concealment algorithm, in the paper, a novel error concealment algorithm is proposed based on the AVS video decoder terminal. The algorithm separately for I frames and P frames using different methods of combining spatial and temporal to correct error code. Simulation experiment shows that the algorithm has better restoration of the error images, the quality of the reconstructed image at the same time significantly improved.