A Design Of Three Order Delta-Sigma Modulator

As the mobile electrical device pay more and more attention to the low power analog to digital converter of high definition,Sigma-Delta analog digital converter (ADC) is wildly used in many fields because it can achieve very high definition while maintain the low cost and become the first choice especially in the measurement and audio application.A Sigma-Delta ADC designed by the top-down design idea is presented in this paper. The structure is chosen at first,then a linear model is given according to the structure and the circuit is implemented with the parameters simulated from the model. The circuit design is relatively relax because of the low requirement of the analog circuit and circuit precision.So more attention is paid to the design of the system level.Many different pair types of Sigma-Delta modulator such as single bit and multi-bit,first order and high order,single loop and MASM,feedforward and feedback, switched-capacitor and continuous time et,is proposed and compared to make a decision which structure is most suitable for the given specification.Then three topologies is simulated based on the decided structure.Finally a three order chain of integrator with field resonator and single bit quantizer single loop structure is chosen for this design.And the system structure is furthermore determined when the structure timing is checked for realization.Linear model,quasi linear model is introduced in this paper for the modeling of the system.And non-linear model which is especial applied in stability analyzing is also presented in this paper.Circuit nonlinearities,such as finite dc gain of opamp,finite bandwidth of opamp,switch turn on resistance,clock jitter, clock feed-through,charge injection et,is analyzed based on linear model and added as noise.Then an improved model is finally constructed.For the circuit implementation a current mirror class AB opamp is designed in the integrator.It has a better performance of gain bandwidth,power dissipation and output swing under the given specification.And a regenerative comparator is choose for the quantizer as its high resolution and low power dissipation.Both of them have the advantage in the compatibility of switched-capacitor circuits.Simulation using Spectre is based on the TSMC 0.35μm mixed signal CMOS process. The results show the modulator achieves a simulated dynamic-range(DR) of 102-dB and a peak signal-to-noise-and-distortion-ratio(SNDR) of 97.84-dB @ -3.5dBFS in a 1-kHz signal bandwidth with an oversampling ratio(OSR) of 128.The power dissipation of the modulator is only 88-μW under 1.5-V supply voltage,indicating low power and high resolution.