The Design Of RF PLL Frequency Synthesizer

Frequency synthesizer is the important element in the wireless transceiver. Frequency synthesizer generates the discrete frequency signal with the similar precision and stabilization with reference signal,which provides the frequency transition basis for the local oscillator.The performance of frequency synthesizer will directly influence the performance of the receiver,especially the sensitivity and the selectivity.In recent years,due to its' superior performance,the rapid developing frequency synthesis technique based on PLL(phase-locked loop) has been the main design scheme for frequency synthesizer.The designed circuits in this thesis are one part of FM radio chip circuits.The circuits provide local oscillating signal for the receiver in RF communication system. Firstly,various frequency synthesis techniques are analyzed,and the advantages of PLL synthesizer are mainly discussed.Secondly,according to the principle of PLL,the principle and mathematics model of every module are in detail discussed.Working condition of the whole loop is also investigated,and the realization mode and mathematics model of PLL Frequency Synthesizer are brought out.The whole circuit concludes voltage-control oscillator,phase/frequency detector,charge pump, programmable divider and so on.The circuit of every module is designed,and simulations are carried out to validate the design.Finally,the layout are designed and verified with cadence software,based on the 0.35μm BiCMOS process of USA JAZZ company.The process is also discussed,and some layout problems in RF circuit layout design have been bought out.Simulation results show that power of the whole circuit is 7.5mW,output frequency scale of the voltage-controlled oscillator is from 148 MHz to 220MHz, charge current of fine adjust charge pump is 0.9μA,the power of charge pump is 62.5μW,charge current of tough adjust charge pump is 43μA,the power of charge pump is 252.5μW,the dividing ratio scale of programmable divider is from 2048 to 8191.The designed circuit has achieved the anticipated performance index.The research work in the thesis provides valuable reference for similar IC design.