The Hardware Design Of Image Processing Card Based On DSP&FPGA

In adaptive optics system (AOS), wavefront processor is the core element of the real-time signal processing. With the development of AOS, higher frame rate of the wavefront sensor is necessary, which requires the wavefront processor has more powerful data processing to ensure the real-time of the system. In the whole working step of the AOS, deal with the real-time image from CCD is the first and important step. All subsequences processing can not go on without the image processing. Therefore, the comprehensive performance of image processor is a great significance to AOS.Not only the background of the research problem and the use state of image processing technology through the world but also the frame, characteristic and model of traditional special and universal image processing system are discussed in the thesis. After analyzing the characters of DSPs chip and DSP system, the thesis introduces a real time image processing system based on the DSP&FPGA. This system can vary from the traditional image processing system based on PC mode in character, improves its performance in the field of real time than ever and reduces the cost of the system in most possible.The thesis confirms the parts of an apparatus select from the design purpose and appliance requirement. The thesis particular introduces the image processing system design about hardware based on DSP&FPGA from its system build-up,logic frame and each function module of the system and analyzed the design technology and the method of realization in details.In the next chapter, based on the introduction of basic transmission line theory in the thesis, aim at the problem in high-speed circuit, high frequency signal integrity problem is stated, including reflection, crosstalk, etc. And explains focuses on how to solve SI, PI and EMC problems in high-speed PCB design.Lastly, the thesis introducs the logic design based on FPGA. Including the working principle and design project of the image incept module. The thesis introduces the basic operation and the operation timing of SDRAM. Expatiates the SDRAM controller modularization design based on FPGA. Lastly, the thesis shows us the emulator result.Lastly, the thesis describes the hardware testing and debugging, and shows us some results.The system is specialized in two aspects: one is high-speed and real-time because of the devices, the programme can running in DSP and FPGA assure the design purpose.The other one is high-powered and better cost-effective. The hardware design can resolve the problems of the real-time image processing system.