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Hardware Design And Implementation Of Real-time Image Processing System Based On DSP And FPGA

Posted on:2011-05-28Degree:MasterType:Thesis
Country:ChinaCandidate:J N HuFull Text:PDF
GTID:2178360305460286Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Currently, digital image processing technology is widely used in various fields, and it has been developed toward the direction of real-time, high-speed, high-resolution, multimedia and intelligent. Therefore it is necessary to design a powerful image processing hardware platform which can provide the verification of the high-speed and real-time image processing algorithms.The purpose of this dissertation is to design a real-time image processing system based on FPGA and DSP. This system can meet the demand of the rate, the amount of data, image processing system's volume, system cost and power. It has the features of real-time and miniuturization.The main works of this dissertation are summarized as follows:1. According to the user's requirements, the image processing system solution has been analyzed. The Sundance TIM modules's structure and properties have been studied, the DSP and FPGA on the TIM modules have been analyzed, meanwhile the CCS, ISE, 3L Diamond softwares are introduced in this dissertation. The verification method and the technology of the system has been proposed in this dissertation.2. The verification of the former image processing hardware platform program has been made in this dissertation. The communication between the modules by CP connection is successful, but the communication between the modules by the bus RSL is failed. After analyzing wo find that the problem is focused on RSL communication, then the new solution of the image processing system has been designed.3. The verification of the new solution has been made about the system's feasibility and the real-time feature in this dissertation. The communication between the modules SMT395 and SMT338 has been designed using the bus SHB, the results demonstrate that, the design of the new solution is feasible. The binarization of 100 BMP format pictures has been made based on the results, by analzing the results, the real-time feature of the system's new solution has been verified. The processing speed can reach 130 frames/sec, and meet the user's requirement (100 frames/sec).
Keywords/Search Tags:Image Processing, DSP, FPGA, 3L Diamond, SHB
PDF Full Text Request
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