Hardware Platform Design Of Real-Time Image Processing System

With the rapid development of electronics technology, digital image processing has been extensively widely applied in many subjects such as aerospace, telecommunications, medical imaging, military industries, etc. At present, digital image processing is developing to real-time, high-speed, high-resolution, multimedia technologies. Therefore, it is necessary to design a verification platform which is matched with the digital image processing system.The purpose of this thesis is designing a hardware platform for image processing by using FPGAs and DSPs. The main contributes of this paper are summarized as follows:1. System structure is improved. By analyzing the requirements of interfaces, rates of the system and the resources on the TIM module, the author has made an improvement on the system structure.2. FPGA logic is designed to access data signals on the basis of Spartan -3An. The logic design introduces implementation of both asynchronous signal access to synchronization system and TDM technologies with 8 channels. Based on the Modelsim-SE6.2b simulation, it has been improved and met the system's requirements.3. Images' formats of RS422 and Camera Link are converted to the LVDS format by VHDL language. This part includes the Cache-Control and the handing of sampling at clock's rising and falling edge. Finally, the author comes to the conclusion that the logic design has gotten functional realization on the Modelsim-SE6.2b.4. Part of core module of the system is studied. This part introduces implementation of RSL bus communication between TIM modules and researching on displaying of analogue signal by SMT339 and SMT310Q.