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Low-power Bus Coding Technology

Posted on:2009-12-14Degree:MasterType:Thesis
Country:ChinaCandidate:N D WangFull Text:PDF
GTID:2178360245968640Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The paper outlines the background on the subject. Introduced the low-power design is an important research direction of IC design ,and is one of important basis for selecting the topic. After detailed analysis of CMOS power source , the conclusion that the dynamic power is the main source of power is reached . Subsequent in-depth analysis of the low-power technology status: firstly, find the low-power design theory from the principle ,and then make a detail classify from the angle of level design and design flow.In the paper, the development processes of the address bus low-power coding technology and data bus low-power coding technology are summarized. Detailed analysis of the typical coding technology in various stages: Gray coding,T0 coding,ABLORZ coding and T0-C coding technology of address bus coding ; BI coding and line coupling coding technology of data bus coding . Reproduces all coding algorithms, carries out algorithms programming and circuitsAccording to the new parasitic effect in deep submicron, the theoretical analysis and experimental conclusion , the deep submicron bus model is built. Aim at bottlenecks of low-power bus coding technology , analysis program characteristic; According to the logic value of adjacent buses, the coupling dynamic dissipation of adjacent signal is computed. The method was used in calculating the dynamic dissipation of N bit bus during M ,so the average dissipation factor pM was obtained to reflect the average power of N bit bus . With the datafile of program address bus,the best routing of bus was searched by computing lowest pM.As a result,the dynamic dissipation of bus is reduced by 38.2%.
Keywords/Search Tags:low-power, bus-coding, dissipation factor
PDF Full Text Request
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