Design And Implementation Of An AVS Decoder On Dual Core DSP Platform

AVS (Audio and Video Coding Standard) is the standard of 2nd generation video and audio developed by China independently. Due to the shortage of feasible encoder and decoder solution platforms, the popularization of AVS in the field of video and audio is obstructed. This dissertation is mainly focused on the research of the application of AVS standard. An implementation of the AVS decoder in a dedicated hardware platform is proposed in this thesis, based on which the AVS decoder algorithm is optimized in order to improve the decoding speed. Finally a real-time decoder solution of AVS is proposed.At first, the core technologies used in AVS are studied and its key algorithms are analyzed. Hardware platform and software environment are two fundamental things of the implementation of AVS decoder. The hardware platform used is a dual-core DSP - ADSP-BF561 based platform. And the software environment introduction is mainly about the establishment of an embedded uClinux OS.The implementation of AVS decoder on a dual-core DSP platform and the optimization of the decoder in order to make it real-time are the most important work of this dissertation.The implementation of AVS decoder is the emphasis of this dissertation. The decoder solution based on ADSP-BF561 is discussed in detail, including the design of Core A and Core B, as well as the data exchange process between them.The optimization of the decoder is the core of this dissertation. The key point of it is the optimization based on the hardware platform. Start with the analysis of the bottleneck of the hardware platform, the principles and key ideas of optimization are drawn out and the details of optimization are elaborated. The optimization based on hardware platform encompasses optimization about every detailed algorithm. And the most important method of optimization based on the hardware platform is to take the advantage of its hierarchy memory architecture. The thesis discusses the processor's memory hierarchy, elaborates optimization about each algorithm process of the macro-block decoding and explains the improvement of the algorithm flow after optimization on hardware platform. Besides, other optimization method is also studied, such as optimization on algorithm of each process module, optimization on C language and assembly language.The AVS decoder achieved the target of real-time decoding after these optimizations mentioned above.