A 6-bit GS/s Flash A/D Converter Design Based On 0.18μm CMOS Technology

Analog-to-digital converter (ADC) is the key device of modern communication, radar and many other consumer electronic products. As a special interface connecting analog world with digital system, high performance analog-to-digital converter is more and more important in the design of mixed-signal integrated circuits. Now the research topic of the ADC focuses on the improvements of the resolution and speed, so that it can be used to process much faster and more complicated analog signals.This paper introduced the design of a novel Flash ADC, which is used in CMOS circuits with low power consumption and high speed. The paper begins with the principle of the Flash ADC and explains its function and characteristics in details by analyzing the development conditions of ADC integrated circuits nowadays, then parts the system into some sub-modules for further research and complete the design and circuits simulations all by myself. The simulation results indicate that it can achieve 5.6 bits for input frequency up to 16.6MHz at 1G sample/s, this ADC consumes less than 500mW and the peak INL and DNL are less than 0.6LSB and 0.4LSB respectively, which can fulfill the requirements of high speed and low power. This design is suitable for standard CMOS technology and can be well applied in embedded system-on-a-chip (SOC) circuit designs.