The Research And Realization Of Key Technology For NoC

It's forecasted by the (ITRS): The integration of chip will arrive several billion in 2010. Characteristic dimension is 45nm, and the frequency of clock will arrive 10 GHz. The number of IP nodes in one chip can arrive more than 1000. The traditional structure On-Chip-Bus can not satisfy the communication between the IP nodes in SoC. New connection structure has become the hot point in the international study of multiprocessor. The kernel idea is that transplanting the network technique to the design of the multiprocessor in order to solve the problem of interconnected communication.The background of NOC is introduced firstly in this paper. The NoC design methodology are carefully studied in the paper. Some main technologies of NoC are described and analyzed, including the key technologies and the frame of simulator, the design of low latency router, the influence of communication localization and using the long-range connection to improve the performance of NoC.The design of low latency simulator is carefully studied in the paper. In this paper the arbitration strategy based on integration of credit and round-robin is proposed. The simulation result shows that, the proposed strategy can improve the performance of NoC effectively. In this paper also studied the influence of NoC performance from the number of VC,single destination node,double destination nod.This paper use the sphericity local distributing to study the influence of communication localization to NoC. Because in the NoC the nodes which communicate frequently will be put close to each other, the communication is partial. To the long distance IP two nodes, we use the long line to connect the IP nodes directly. The simulation result shows that: Increasing the value of localization and using the long connection can improve the performance of NoC clearly.