Research Of Data Collecting And Processing Technology Based On FPGA

At present, Digital Signal Processing has been applied extensively in many subjects such as communications, radar, sonar, speech and image processing etc.The theory of signal processing algorithm has being mature, however, how to realize by means is still worth discussing. FPGA is super large-scale, ultrafast programmable logic device that use extensively in recent years, Because it has merit of high integrated level, the high speed, programmable in system etc, has brought the break through change for the digital system design, greatly drived the single chip and automation of the digital system design, has shortenned single digital system design cycle, improved design flexibility and dependability. It has very extensive application in the ultrafast signal progcessing and in measure and control in real time.The article researches the data collecting and processing technology based on FPGA. Based on the high speed of FPGA in data collecting and signal processing and the developing trend of single ship, the article put the FPGA as the control core of the data collecting and processing system.The main studies is as follows:Studies on FPGA's single chip system.Aim at the data collecting and processing, choose the FPGA type, design the structure of the single chip system based on FPGA. Design divided into three modules: multi channel collecting control module, data processing module and data store control module.Design of multi channel collecting control module.Use four AD7506 and one AD7862 to collect 64channel analog signals periodically.Design and simulate the multi channel selecting control modul and A/D converter control modul, finish the multi channel collecting control modul based on FPGA.Design of data processing module. Since FFT plays an important role in digital signal processing, implementing FFT with FPGA is presented and the total realization graph is designed. Design and simulate the twiddle factor multiplier, butterfly processing unit, memorizer, controller. For improving speed and decreasing computing complexity, high efficiency multiplier algorithm is used to realizing twiddle factor multiplier of butterfly processing unit.Theory analyse and simulation result indicate that the state machine control these modules sequencly and harmoniously.Design of data store control module. Use the flash memory K9K1G08UOA to store the datas after collecting and processing. Design the hardware joint of FPGA and flash memory, the data store control module.The article mainly probes into the hardware realization of FFT algorithm. Combine with the characters of the single chip system, system is divided into multi channel collecting control module, data processing module and data store control module to design and simulate .All designs are programmed with VHDL. simulate and test result indicate that the FPGA single chip system can collect and process the real-time signal with high speed.