Fpga Implementation Of The Rs Codec

Being an important linear block code in error control field, the RS code has very strong correction abilities, so it is widely used in various modern communication systems as to satisfy the reliability of data transmission channel.Domestic RS coders achieved by FPGA have not became mature nowadays, which adopt RS code IC or programmable DSP IC have their limits. They cant be used widely in embedded system design. We need to excogitate a more effective method to carry out RS coders.Main work and innovation in this paper:Firstly , RS encoder and decoder are carried out by FPGA. Secondly,as a result of the optimization of the operation tache, logic units are used less and the function speed is also increased, which is one of this paper's innovation. Thirdly, this paper realizes the Galoias multiplier , syndrome circuit and Berlekamp arithmetic circuit etc via VHDL language. At last, the author implement the ECC in the flash disk system with CMOS chip EP1C6Q240C8 of ALTERA' s Cyclone .which reaches the anticipative performance. This is another innovation of this paper.