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IP Terminal Design Of Signal Collection And Process Based On NIOS Ⅱ

Posted on:2008-11-25Degree:MasterType:Thesis
Country:ChinaCandidate:X D GaoFull Text:PDF
GTID:2178360215971355Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
The paper is based on the technology of NIOSⅡand FPGA which belongs toAltera, mainly researched the collecting and processing for the disaster local data afterearthquake, and also researched the long-distance transmission for data through theEthernet. Take the SOPC technology as the mean, and final realized through theprogrammable system for the signal gather and transmission hardware circuit. Thecharacteristic for this method is which combined the control for ADC, the filter fordigital signal and the design for TCP/IP by FPGA, and took the 32bit CPU and NIOSⅡrealized the whole system's state control. By embed the TCP/IP protocol in NIOSⅡrealized the network transfer which was without PC terminal.This design is mainly researched from the following four aspects. First, using theFPGA's logic function controlled the ADC' s working, for which can progress thedata interface in ordain time and control the ADC' s pins so that both can harmoniousand synchronous work and compiled relevant programs. Second, using the SOPCBuilder and DSP Builder designed the DSP module, realized the FIR filter functionbased on the NIOSⅡwhich established interrelated C/C++ macro code so that thesoftware can visit the user custom logic. Besides, we combined and compiled theVHDL's RTL code which from the tip-layer and the emulator files. We choose theDSP Builder which can transfer EDA software such as QuartusⅡand so onautomatically. Third, using the embed operating system uC/OSⅡcompleted thedesign for the system and the LwlP transplant under the uC/OS-Ⅱwhich offered theinterface for the operating system and the LwIP. So, it just need to modify theinterface when transplant the LwIP to a new system. Forth, designed and executed thecircuit of the signal gather and IP transfer which concluded the ADC,FPGA,RAM,Flash and correlative periphery circuit.
Keywords/Search Tags:NIOS II, FPGA, SOPC, signal gather, uC/OS-II, IP terminal
PDF Full Text Request
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