Study Of A All-Purpose Channel Coder For Experiment Based On SOPC

Channel coder is always employed in wireless channel or storage system that is interferefering. Recently, as the development of VLSI ,ASIC or FPGA implementation of error-correcting codes is intensely being studied.This paper describs an all-purpose design of channel encoding and decoding device which improves the disadvantage of traditional ones. It combines computer technique with teaching experiment of communication and integrates the encoding and decoding module and the MCU module on a single FPGA chip based on the SOPC technology.So the performance such as integration,stability and expansibility improvs much. And its attraction and currency act well.It refers to VHDL,hardware design,C and compunication.This paper discusses the followings:First, this paper investigates the arithmetic of differents of channel encoding and decoding, for example,Hamming code,RS code,convolution code,interlaced code and HDB3 code. And implements them with VHDL. It is proved through experimentation that the coder and decoder work rightly whether they do together or separately. Different coders and other modes are obtained by changing the set simply.Second, this paper investigates the SOPC techniques and constructs the development platform which is consists of QuartusII,SOPC builder and Nios IDE. Then we finish it with the Cyclone produced by Altera.This hardware platform can implements other SOPC and FPGA system.