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Design Of High-rate Configurable Multiplexer Based On CCSDS AOS And FPGA

Posted on:2008-06-06Degree:MasterType:Thesis
Country:ChinaCandidate:W H ZhangFull Text:PDF
GTID:2178360215464237Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
In this dissertation, the design idea of the high-rate configurable multiplexer, which is based on the recommendation for Advanced Orbiting Systems networks and data links, is set for practical requirements of ground testing in aerospace engineering. Technical specifications such as virtual channel protocol data unit,asynchronous multiplexing, error control and pseudo-randomizing are adopted and the high-rate configurable multiplexer is designed on FPGA device. The design has been simulated and its performance has been confirmed before high-rate configurable multiplexer hardware platform is established. Finally, a testing system, which includes data source, data receiving equipment and the instruction source, is built to validate the function and the performance of the multiplexer.The results of experiment indicate that at the data transmission rate of 144Mbps, high-rate configurable multiplexer can not only multiplex six channels asynchronous data correctly and format the data stream with CADU form, but also change its parameters and states by the control of configuring instructions. The result is quite consistent with the design requirement.
Keywords/Search Tags:AOS, Ground Testing, high-rate configurable multiplexer, FPGA
PDF Full Text Request
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