The Design, Based On Fpga Technology Onboard High-speed Multiplexer

With the development of the space technology, the amount of scientific data grows rapidly. An efficient and high speed space data link network is needed. Being important equipment, high rate multiplexer plays a key role in the function of the space data link network.In this article, a method that designs the high rate multiplexer with FPGA technology and VHDL language is described. The multiple digital signals will be multiplexed in one data channel by the multiplexer, while the data is packaged in CCSDS standard format. The algorithm that make data channel alternate regularly is also elaborated in the paper.In this design, a model is established with VHDL. A testbench program is edited to simulate the behavior of the FIFO. After the software simulation is accomplished, a real hardware circuit is designed to multiplex two data channels (1553b data channel and 1394 data channel) according to CCSDS standard. During the experiment and hardware debugging, the output logic of the FPGA is checked up. The method of the design and the algorithm is also verified. The result meets the requirement perfectly.With FPGA technology, the speed of the high rate multiplexer is greatly increased. It will be applied in the spacecraft data systems and meet the requirements of the space missions in future.