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Design And Implementation Of Digital Multiplexer Based On FPGA

Posted on:2005-08-27Degree:MasterType:Thesis
Country:ChinaCandidate:Y J XiaoFull Text:PDF
GTID:2168360125456249Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
This subject is a part of "Imaging Inspection for Ground System "which belongs to one project of Wuhan University National Defence Academe cooperating with China Space Technology Academe. The whole system receive 88 channels image data of 10bit/10MHz come from CCD, save and display it at the same time. This subject is the pre-processing part of the whole system, it receives 88 channels image data of 10bit/10MHz come from CCD and composes four branches signal into one channel signal that is image data of 10bit/40MHz.This paper mainly discusses some theory about digital multiplexer, the paper's difference with other multiplexer, and how to implement the design using the FPGA. The content mostly refers to signal pre-processing and post-processing, signal synchronization, digital multiplexer, and system integration.The paper develops it in the Xilinx ISE 5.2 environment, and the assistant tool is used to simulation and synthesis, which is Model Sim5.5d for simulation and Synplify pro 7.1 for synthesis.
Keywords/Search Tags:multiplexer, demultiplexer, FPGA, CCD, synchronization
PDF Full Text Request
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