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Design And Implementation Of USB SIE IP Core

Posted on:2007-09-25Degree:MasterType:Thesis
Country:ChinaCandidate:Q ZouFull Text:PDF
GTID:2178360212977840Subject:Radio Physics
Abstract/Summary:PDF Full Text Request
USB (Universal Serial Bus) is one of the most pervasive bus standards nowadays in consumed electronic devices and peripherals. There are few USB ICs designed by local companies at present. Most of them are imported from those worldwide IC Corporations, like Cypress and NEC etc. So, to design this kind of USB controller IC independently, instead of using the similar products aboard, would be of a large potential market and profit.The purpose of this paper is to design a feasible and reusable USB SIE (Serial Interface Engine) IP core, based on FPGA. This IP core handles the standard USB transactions. And embedded with a MCU it would provide all the USB functionalities. So it has the merits of simple architecture and easy redesign. It is similar to some special USB SIE ICs, like PDIUSBD12 from Royal Philips Electronics.Through the simulation and verification, the results show that our SIE core can replace the same production imported. The innovations in our design are: 1. flexible speed mode configuration, low-speed / full-speed / high-speed; 2. up to 31 endpoints are available when developing special products; 3. applying RTL methodology and also developed verification Test Bench source code; 4. hardwired USB protocol layer, no firmware invention required.
Keywords/Search Tags:USB Serial Interface Engine, Register Transfer Level, IP core
PDF Full Text Request
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