Font Size: a A A

Research And Design Of Recongfigurable JPEG/MPEG-2 Multimedia Decoding Chip

Posted on:2007-03-12Degree:MasterType:Thesis
Country:ChinaCandidate:H B ChenFull Text:PDF
GTID:2178360212965561Subject:Computer applications
Abstract/Summary:PDF Full Text Request
Kinds of multimedia standards appear in the progress of universally applying of the multimedia technique. To meet the various demands, many multifunctional multimedia chips appear in the market. These multimedia chips have power functions and widely application, but they are all have the shortcoming of high power-consumption and high resource-consumption because of integrating many functions.The technology of recongfigure can figure out the shortcoming above. This thesis firstly analyses the two ways of designing reconfigurable system. By combining the advantages of the two ways, a recongfigurable method which based on the reconfigurable datapath(rDP) technique was advanced in this thesis. The method dynamically recongfigures some arithmetic by making use of the datapath control module to reform the function units which are partitioned from the arithmetics, and applies the clock signal to the function units which are used in the current running arithmetic. Because of the communal units and no clock signal applying to unusing units, the system based on this method, perfectly resolves the disadvantages of the traditional system, such as high power-consumption. It is easy to update the function units by normalizing units interface.We analyse the multimedia decompressing/compressing arithmetics and the JPEG/MPEG-2 basal decoding processes. Considering the characteristic of the multimedia arithmetics, we advance a model of dynamic recongfigurable multimedia chip based on rDP recongfigurable method. We analyse the problems of the model we should solve and the performance of the chip based on the model.Finally, this thesis give the design of a chip supporting JPEG and MPEG-2 decodeing arithmetics based on above model. The way how to partition these two arithmetics, the designment of the synchronous communicate interface for all the units and the designment and validation of some important units were introduced in this thesis, then some data were given to explain that the decoding system based on the model has an advantage of the system based on other ways. The new way to design multimedia chip, which base on the rDP model, contributes a lot to the multimedia area, especially the embeded multimedia area.
Keywords/Search Tags:multimedia chip, dynamically recongfigure, FPGA, reconfigurable datapath, JPEG, MPEG-2
PDF Full Text Request
Related items