System Of Synchronization Based On PCI Local Bus

With the development of science and technology, timing and synchronization will play more and more important role. World wide web is so limited in China and most industry sites are built in rural area that it is difficult to make use of network to reach synchronization, thus, the synchronization board in this thesis is to set up a emendation system in every computer and realize synchronization through emending their system time. This synchronization board will have application in the crude oil transport pipeline leak detection system to ensure the high precision of the system.In this thesis, Complex Programmable Logic Device (CPLD) is used to pick up and deal with time signal, PCI local bus is selected as transport channel of time signal, and the precise time received by GPS OEM is applied to correct the computer system periodically. PCIMegaCore is used to realize the control of PCI local bus and the transport of time signal. Compared with other synchronization technology, the GPS synchronization technology is more suitable for synchronize the time benchmark of the industry sites. The use of 1pps in GPS can improve the precision of synchronization remarkably.Complex Programmable Logic Device (CPLD) is selected as core control module and meanwhile Very-High-Speed Hardware Description Language (VHDL) is applied for system programming. The content of this thesis mainly includes the following four points. Firstly, based on the function of this synchronization board, a whole structure is designed and its PCB is achieved in term of the principle of signal integrity. Secondly, the system is divided into several modules and VHDL is used to describe each module. Thirdly, analog simulation is performed for each module and the whole system with the EDA software Quartus II 5.1 produced by Altera. The simulation result indicates that the function of each module has satisfied preset requirement of the whole system. In contrast to traditional design method, VHDL holds several outstanding advantages such as short design period, excellent integrated density and stability, convenient for modification and update of system functions and etc. As CPLD chip has stable performance and low power consumption. Finally, the driving program was designed based on WinDriver.