Research Of CPLD-based Digital Ultrasonic Peening

Ultrasonic peening treatment (UPT) is a new technology developed in recent years. It plays a prominent role in improving the fatigue strength of welded joints and fatigue life. As for its advantages of handy equipment, little noise, high efficiency, low cost and energy saving, it has been one of the perfect post-weld treatments for improving the fatigue performance of the joints. With the development of modern electronic technology, Digital UPT is the inevitable trend.Digital UPT includes digitalization of power circuit, control circuit and man-machine interaction system. This thesis designed dead logic module (control circuit) and display system module (man-machine interaction) on the basic of theoretical analysis, applying CPLD (Complex Programmable Logic Device) and VHDL (Very High Speed Integrated Circuit Hardware Description Language).Firstly, the development, application and classification of CPLD were introduced. Compiler settings of CPLD and VHDL were described in detail. The depth analysis of CPLD and VHDL provided a theoretical basis for dead module design and display system.Furthermore, the analysis of tradition design method and CPLD method was carried on according to CPLD development process and UPT control circuit requirements. Dead hardware logic circuit was programmed with VHDL, completing module design of dead logic.Finally, the depth analysis of working principle and the basic frame format of UART (Universal Asynchronous Receiver Transmitter) was carried on. According to serial communication protocols, the method of serial communication with CPLD was researched, achieving the URAT module design. According to the technical parameters of LCD and actual display requirements, display system was programmed with VHDL, completing the whole module design for display system.On-line testing shows that, the dead logic designed with CPLD works reliably and stably. The display system can meet practical requirements.