The Design Of AOS Synchronous Transmitter Based On PCI Bus

This paper particularly describes the design&implementation of AOS Synchronous Transmitter based on the PCI Bus. The background of the subject is that the CCSDS (Consultative Committee for Space Data Systems) has designed AOS (Advanced Orbiting System) for manned space flight. By using AOS, which can transmit data bidirectionally and symmetrily between the space system and the ground system to serve for customers.Nowadays, each spaceflight courtry is gradually adopting the AOS data standard. Therefore, the research of the AOS key equipments-Synchronous Transmitter is very significant.Synchronous Transmitter works on the AOS physics layer, which is taking VCA (Virtual Channel Accessing layer) 's VC-PDU (Virtual Channel-Protocol Data Unit) with the CCSDS provision of 4 bytes synchronous code 1ACFFC1D, and then send the data out serially. Because the satellite wireless channel adopt the QPSK as the modulated and demodulated way, the export of Synchronous Transmitter shouLD# be three lines plug (include data, synchronous pulse, and the signal ground), which lead to demodulation equipment.Synchronous Transmitter tries to make its velocity capability to 300Mbps. Among all of the recent mainboard bus, only PCI bus can support the keeping of a 300 Mbps thruput, so Synchronous Transmitter's research is based on PCI bus. Because PCI bus protocol is complicated, we used of the PCI target interface chip- AMCC S5920 to carry out the control of the PCI bus.At the same time, for the sake of the maintenance of the durative even-speed code-flow, we shouLD# apply the FIFO (First_In First_Out memory). The subject achieves the connection of S5920 and FIFO, and assues the high-speed transport of the signal.Through effort, Synchronous Transmitter has achieved principiumly basic principle design and verification which this subject requires.