The High-Precision Realization For The Design Of Charge Redistribution SAR ADCs

Analogue-to-digital converters (ADCs) are the key components of the signal processing systems. Charge redistribution successive approximation ADCs (SAR ADCs) are widely used in ADCs of middle speed and middle or high resolutions because of their high ratios of performance to price. But for high-resolution charge redistribution SAR ADCs, traditional algorithm and structure cannot get the high-precision. Thus some special design has to be made to realize both high-resolution and high-precision. In this paper, referring to the design of a 16-bit ADC, the bottlenecks of the precision realization were analyzed, and the solving methods were also proposed.On algorithm, series combined capacitor arrays were employed for the charge redistribution SAR structure. On one hand, the area of the capacitors would not be too large. On the other hand, the matching of the capacitors would be better But designing the value of the coupling capacitor properly was very important, especially when the impact of the parasitical capacitors could not be neglected. That was the first bottleneck. In this paper, the optimization of the value of the coupling capacitor, according to the value of the parasitic capacitors, was discussed. This method has been successfully applied to design a 16-bit charge redistribution successive approximation ADC, in which the Spectre in Cadence was used for the simulation.On circuit design, the design of the high-precision comparator was the second bottleneck. In this paper, a comparator with precision of 19μV was designed. The...