The Research And Design Of Sigma-Delta ADC

Analog to Digital Converters play an important role in an ever-increasing digital world. Sigma-Delta conversion technology is based on oversampling, noise shaping, and decimation filtering. These converters exploit the enhanced speed and density of the advanced VLSI and overcome limitations on resolution resulted from the component mismatching. Now Sigma-Delta ADCs have been widely used for high resolution A/D conversion.In this thesisi the basic theory of Sigma-Delta ADC is introduced in detail. And then a design of 18bit Sigma-Delta ADC is developed. The analog module of the ADC is designed with a 2-2-2 MASH ΣΔ modulator of 18bit resolution. The architecture of modulation is fully differential switched capacitor circuits, its sampling frequency is 2. 56MHz and oversampling ratio is 32. All simulations are carried out successfully with the AMIC5N' s normal SPICE models on the FUJITSU PP400 workstation and the Cadence tools are used. The resolution and conversion speed of Sigma-Delta ADC are determined by the performance of the modulator, but its area and power consumption are mainly determined by the decimation low pass filter. The principles and design methods of the decimation filter are studied. The digital module of the ADC is designed with a decimation low pass filter based on Matlab. Its bandwidth is 20KHz for a 18bit ΣΔ ADC. The input sampling frequency is 2. 56MHz and the output frequency is 0. 08MHz. The passband cutoff frequency of the filter is 0. 02MHz, -stopband cutoff frequency is 0. 04MHz, and the maximum passband ripple is about ±0.001dB.