Study And Simulation On Memory-Coupled Reconfigurable Hardware Accelerative Device

It is hardware accelerate device, not more microprocessors, can be used to obtain high productive of the computer system. Reconfigurable device, which is a novel device, can not only obtain high performance like application specific integrated circuit, but also obtain flexibility like microprocessor. When deal with some kinds of programs and applications, we can combine microprocessor and the reconfigurable accelerate device to construct hybrid reconfigurable compute system. The reconfigurable device can change its implementation based on the applications, thereby can support large amount of applications and programs with only one accelerate device. Thus, the hybrid reconfigurable computer system not only has high performance, but high flexibility.In hybrid reconfigurable computer system, there are four coupling manners of the microprocessor and the reconfigurable accelerate device, that is register coupling manner, coprocessor coupling manner, memory coupling manner and bus coupling manner. And the memory-coupled manner is better than others when to deal with computing-intensive applications.Then we put forward the architecture of the memory-coupled reconfigurable hardware accelerate device, and discuss some questions about it, which include the development of the hardware accelerate device, the implementation of the reconfigurable device, the program's compiler model, operating system and the development of the software.Then we use the FPGA to implement three computing-intensive applications,that is DES algorithm, Floyd-Steinberg algorithm and 64-bit matrix multiplication.In order to parse the efficiency of the hybrid reconfigurable compute system, we set up a new system simulator for the hybrid system and test the programs with the simulator. The results show that the hybrid reconfigurable computer system is feasibility and has better efficiency than the computer system based on the microprocessors.