Test Pattern Generation And Fault Simulation For JX5 Microprocessor

Test has become an absolutely necessary tache of the design flow in the digital integrated circuits.JX5 microprocessor is a full-custom designed chip of great integration and complexity. Because dynamic logic and analogous circuit are widely used in it, which makes the logic netlist of this processor a mixture of all types and levels of description including circuitry level, gate level, RTL level, memories and so on. And what's more there is no DFT structure which is aimed at the test in it. In this case, it is impossible to realize the automatic test generation by software tools. So solving the test pattern generation problem is the emphasis of the article.There are two challenges to realize the fault simulation for this full-custom designed chip of great complexity. Firstly, the space-time consumption is very tremendous, which makes us find a way which can reduce the difficulty of realizing fault simulation. Secondly, the fault simulation tools are all aiming at gate level, but JX5 microprocessor is described by the circuitry level, gate level and RTL level, so it becomes a problem of how to read in the netlist and actualize the fault simulation.In this paper, based on the study of the structure characteristic of the JX5 microprocessor and the actual requirement of the test, the research around the the full-custom designed microprocessor's specific archicture and the difficulty of test pattern generation and fault simulation is made. A scheme of test pattern generation and fault simulation is proposed. In this scheme, we transform the functional verification programs into the test pattern, use the debugging chain to supplentment test pattern, pretreat and then read in the mixed netlist, and apply the fault locally based on the functional components. This scheme uses the functional verification programs efficiently by transforming them into test patterns to complete the basic fault coverage. And at the same time, the testing structure of JX5 microprocessor is fully made use of to perfect the test patterns and improve the fault coverage. So this scheme satisifies the JX5 processor's testing demand fine. Finally the author implements this scheme in the detail and ensures the microprocessor's testing too.