The Research Of Compression Techniques On Pairs Of Test Vectors Which Were Used In I_DDT Testing

With the fact that the integrated circuits are becoming more complicated, the number of latent faults in a circuit is growing gradually, so the test patterns which can detect those faults are increasing tremendously. The research on how to minimize the test data volume without adding unacceptable extra hardware to the circuit-under-test(CUT) as far as possible is becoming the one of the most important challenges in IC testing field.In the existing research on compression of test data volume, test patterns are used to detect the stuck-at faults in the CUT, but with the regard to a pair of test patterns which can detect the stuck-open faults or time-delay faults in the CUT, few research had used them as the object to their compression methods. We always detect the stuck-at faults through voltage testing method, but in the case of detecting stuck-open faults in the CUT, the IDDT testing method is performed. We can detect the stuck-open faults by counting the differences between two vectors were put into the CUT in turn.In this paper, in order to reduce volume of the pairs of test patterns which can detect stuck-open faults, we first propose a BIST mix-mode testing tactic, which are composed of two parts: 1) pseudorandom test and 2) deterministic test. Using an modified linear feedback shift register (LFSR) as a generator to generate pairs of test patterns, the tactic not only can generates a continuous pseudorandom pairs of test patterns, but also can compress some pairs of test patterns into smaller LFSR-state seeds. The result of the experiments indicates that this tactic can drastically decrease the volume of pairs of test patterns without paying high cost.Secondly, we produce a run-length code compression tactic to compress the pairs of test patterns. This tactic is totally different with the above-mentioned tactic. The contribution of this tactic are consisted of 1) proposing a ordering method which can improve the compressing ratio to arrange the test patterns, we call it second-ordering, 2) proposing a new run-length code compression scheme, and it performs better than some existed run-length code schemes, the compressing ratio for the new code scheme is also increased, 3) offering an alternate low cost decoding construction, which can easily be embedded into the CUT and it will not affect the CUT's own function. The result of the experiments shows that the new scheme is more suitable for compressing pairs of test patterns than other run-length code schemes.Finally, on the base of the new run-length code scheme, we bring up a new method to diminish the total test volume of mutiple cores by reusing the scan-chains of the mutiple cores, and we verify the effectiveness of this method in multi-core environment.