Design And Implementation Of Debugging Structure Of An X Microprocessor

Along with the semiconductor technological level enhancement, the chip scale and complexity exceptionally are huge, which causes the detection of its internal nodes more and more difficult and even impossible to be made. This makes the debugging and the test difficulty also greatly strengthen, thus design for debugging must be incorporated in chips.Based on the deep studies of X microprocessor's debugging demands on the system level, the instruction level, the hardware architecture level and so on, combined with the characteristic of its structure, this article proposes a complete set of debugging design scheme for X microprocessor. Under the premise of as few increase of the debugging hardware cost as possible, this plan has provided very strong debugging ability and meets the debugging demands to the different level efficiently. The author has also realized this debugging scheme specifically and constructed the X microproce ssor's debugging structure.On the basis of debugging demands, the X microprocessor's debugging structure is composed of three levels: the user system level debugging structure, the instruction level debugging structure, the hardware architecture level debugging structure. At the same time the three levels of debugging structures are combined with the international standard board level debugging structure (boundary scanning), which enables that the access of each of the above three levels can be made through boundary scanning ports easily. The user system level debugging structure is designed for debugging in application software, system software and the multitasking system, which allows at most four hardware breakpoints to be set and thus provides user's program with effective tracing and debugging methods, The instruction level debugging structure offers direct access and control to the invisible functional components, including Cache, BTB and TLBs and so on in the microprocessor, which allows users to debug these invisible components directly and make sure if there are some design mistakes, The hardware architecture level debugging structure allows hardware designers to control and observe the processor's internal nodes, which makes it convenient for the detailed hardware structure debugging and possible for hardware designers to control and observe the specific logic circuit in it.The practice proves that this article has designed one kind of succinct and highly effective debugging structure for X microprocessor which can perfectly satisfies the debugging demands on the three levels.At the same time, this topic has also designed the performance test logic for PLL according to its characteristic.