Fast Generation Of Simulators For Customized Processors

As time-to-market requirements place greater burden on designers for fast design cycles, Application Specific Instruction-set Processors are introduced into the embedded system. The ASIP design process is subject to various stringent constraints of size, power consumption, timing and performance. Hence, an intensive design space exploration is conducted to find a desirable solution for a specified set of constraints. Under this exploration, there is a need to generate specific simulators for all the candidate architectures. It essentially involves, rewriting the simulators completely with each design alternative. Often unavailability of such simulators cause the design to fail as the development of tools is a time consuming process and result in delay in the application development.Traditional simulators can not be easily reused between a series of processors, so designers can not effectively explore design space. A fast generation methodology of simulators will be most useful if it can be easily adapted to generating simulators for different processors. This property is commonly called retargetability. Retargetable techniques can greatly reduce the re-development cost of instruction set architecture simulators. To realize software tools retargetable, it is effective to adopt the description language based methodology.A fast generation methodology based on architecture description language for retargetable simulators is proposed in this paper. To support this methodology, a novel language named wk-ADL resulting from collection of the characteristic of embedded processors has also been defined. wk-ADL allows for extensible descriptions for both instruction set architectures and their microarchitecture implementations. In such a process, processor can be described in an abstract way using wk-ADL and various retargetable tools can be generated using tool generators. This methodology can be implemented in early period of ASIP design.By varying the processor description of ASIP and evaluating the resulting object code one can effectively explore the design space of both hardware and software components. Measurement has been collected to show the correctness and good performance of this retargetable simulator.