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Study On Retargetable Software Tools For Reconfigurable Instruction-Set Processor

Posted on:2011-10-07Degree:DoctorType:Dissertation
Country:ChinaCandidate:H Z ZhangFull Text:PDF
GTID:1118360305466708Subject:Computer system architecture
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Computer system has been more complicated because of the rapid development of electronic, network and hardware technique. With the emergence of new applications and varied user requirements, the programmability and calculability of processors become more and more challenging. The conventional processor design based on static instruction sets can't achieve the requirements on both of performance and flexibility. So the reconfigurable instruction set processor (RISP) emerged.RISP is the application specific instruction-set processor combined with reconfiguration technology. Through the programmability of reconfigurable arrays, RISP can custom the best appropriate environment for a special application executing, so that it can efficiently meet diverse requirements in the embedded domain. RISP is very different from the conventional processor that its instruction set can be modified when executing, and so the software tools which are designed for the conventional processor don't adapt to code generation of RISP. To take full advantage of the performance of RISP, the new software tools design methodology for fitting dynamic instruction sets is needed.According to the above, this dissertation presents a design flow of retargetable software tools development environment (RSTDE) based on our RISP framework named DP-RISP which supports dynamic profiling. RSTDE profiles the simulating execution of applications, generates new extended reconfigurable instructions and maps them to source codes. Then it retargets compiler and simulator with the new instructions to generate the optimized binary codes for applications. RSTDE can keep the consistency and reusability of applications after the architecture of DP-RISP has been reconfigured. It can accelerate development of software tools, reduce workload of developers and expedite the design and evaluation of new embedded processors.In RSTDE, profiler and compiler are the main parts and the interface between them is the mapping mechanism for dynamic traces to static codes. Therefore, to implement the design of RSTDE, the dissertation focus on the three key techniques including dynamic profiling for hot spots of applications, mapping the dynamic spots to static codes and code generation of the retargetable compiler.The novelties and contributions of this dissertation are as below:1) Presents a design flow of retargetable software tools development environment for our DP-RISP. The flow includes dynamic profiling, dynamic-to-static mapping and retargetable compiling, which adapts to the change of hardware and software.2) Presents a configurable profiler for dynamic hot path detection. It can work with processors loosely and accurately obtain sensitive hot information of executing programs on instruction level while supports multiple sampling policies. Through configuration, the profiler can perform different profiling policies and profile target programs continuously or discretely.3) Presents a dynamic-to-static code mapping algorithm which is based on the polynomial representation. Through the polynomial representations of basic blocks and even functions and loops in codes, a method of polynomials matching by layering exploration is used to map dynamic traces to static codes. The results are then used to annotate and instrument source codes.4) Presents a mixed code-generating algorithm based on the extension of the conventional three-step method in compilation. The algorithm generates the binary codes for extended reconfigurable instructions according to the reconfigurable resources and configuration and makes the best reuse of the conventional method.
Keywords/Search Tags:RISP, software tools, retargetable, dynamic profiling, code mapping, code generation
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