| The Application Specific Instruction Set Processor(ASIP)is designed for specific applications and has the flexibility of General-purpose Processor and the performance advantages of Application-Specific Integrated Circuit.However,the current design of ASIP lacks software tool support.In the initial stage of the design,the instruction set and microstructure of ASIP are not completely determined,it is impossible to construct a more complete software support environment,and it is difficult to evaluate the performance of the software.At the same time,a small number of manually constructed testcases are difficult to comprehensively verify the complex microprocessor logic.This thesis proposes the software tool IDEA(Instruction Design,Emulation and Analysis),the main functions are 1)The core of IDEA defines the public description interface of the instruction system,simulator execution flow,assembly language description method.Designers of ASIP can use C++ language to build microprocessor models,and software developers can write assembly programs and evaluate program performance in the IDEA environment;2)Automatically generated test cases can support ASIP’s Instruction-level verification.In addition,we designed and implemented an So C system-level simulator including ARM,memory,DMA controller,and interrupt controller for a special processor to verify the correctness of the heterogeneous collaborative calculation results in the So C.We have effectively supported the design and verification of an ASIP through the above tools.In 4 months,the project used 8 man-month to complete the instruction system modeling,and the design and implementation of 10 core program segments(the longest more than 4000 assembly instructions).The difference between the number of cycles of the IDEA simulator and the number of cycles obtained by the Verilog simulator is less than 10%.962,334 instruction test cases were automatically generated and verified,and more than 50 various design errors were found. |