Implementation Of The Ultra High Speed FFT

With the development of modern technology, FFT has been a powerful tool which can be widely used in such fields as: radar, sonar, communication, and so on. Main realization means of FFT include computer, DSP and FPGA.When we use DSP device TS101 of AD Company to realize 256-points FFT,its data throughput is 58MHz. When we use FFT IP core of Altera Company to realize the same points FFT,its data throughput is only 337MHz .They are not fast enough to be used in some field of radia signal processing,which requires the throughput of FFT to reach 1GHz.Under this background, a design of ultra high speed FFT processor based on FPGA is developed in this paper. At present we always use radix-2 and radix-4 to carry out FFT. When the scale of FPGA is expanding,it's possible to implement higher radix FFT. This topic uses Stratix II of Altera company to carry out a processor of radix-16 FFT.In this design, radix-16 FFT is carried out by radix-2 FFT, The design uses rational time sequence arrangement to make butterfly computing,data transformation and memory coincide.In order to avoid the bottleneck,pipeline pattern is used,this method acceletates the operating.The scheme realizes the 4096-points and 256-points FFT, their operation clocks can both reach above 100MHz. Among them ,the throughput of 256-points FFT is up to 1.36GHz.