Based On The 1024-point Pipeline Work In The Fpga Fft

Along with development of the modern electrical technology, such as Radar system, image processing ,communication system, high speed and real time digital signal processing is demanded. Researchers is seeking high-speed digital signal processing algorithm to satisfy high-speed processing data. Generally the device used for high-speed and real time digital signal processing includes ASIC, programmable digital signal processing(DSP) chipset(such as TI, AD, etc) and field programmable gates array (FPGA).In recent years, FPGA has the characteristics: flexible programmable logic which can be conveniently used to implement high-speed digital signal processing, for it break through the level limit of parallel and pipeline, reconfigurable logic resource on chip thus the resource can be utilized effectively. The researchers who engage digital signal processing are favoring FPGA . This thesis mainly study high_speed and high_order pipeline method FFT based on FPGA . This thesis uses Xilinx Virtex_II FPGA and some design tools , such as ISE ,Modelsim, Synplify, and Matlab. Finally , it completes 1024 points FFT based on pipe line method. And the FFT's work frequency achieves 50MHZ and meets the requirement of design..