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Design Of Airborne Video Compression And Data Multiplexing System

Posted on:2012-10-16Degree:MasterType:Thesis
Country:ChinaCandidate:J Q GongFull Text:PDF
GTID:2178330338492113Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the development of the electronic technology, People depend on data more and more. The demand of sharing the multimedia data especially video data has become more and more. However, video data has the character of large amount of data, real-time. In the condition of limited network bandwidth, it can only compress the video data. There are many compression algorithm, JPEG2000 video compression algorithm takes every frame of the video as a still single image to compress, so there is no need to do frame coherence when do video decompression. It is ideal for real-time video transmission system.The system is designed to compress video data from four cameras, and transfer the video data along with the data of remote sensing back to ground through 3.84Mbit/s wireless channel by the way of bus competition. The ground part of system is designed to split the received data and transfer the sensing data to control system. Also, it must de-compress video data and play the video on the monitor. It is required that the system can not only transmit four channels of video data, but also can transmit one channel of video data in HD mode. The video delay should not be more than 300ms.This paper introduces and analysis the system's target first. Then, it introduces the hardware design of the system. The whole system is divided into three different function parts to do detailed analysis. They are video compression and decompression system, data transmission and channel selection system, data receiving system. The paper detailed introduces the hardware and software design and highlights the data transmission and channel selection system, data receiving system. At last, it gives the results and evaluates the performance of the system.ADV202 is used to do video compression and decompression. SAA7115 serves as the chip of video decoder, while SAA7121 is the video encoder chip. The system uses ATMEGA128 as the microcontroller. XILINX SPARTAN3 FPGA is used to achieve the function of data transmission and data reception.
Keywords/Search Tags:JPEG2000, ADV202, bus competition, data distribution
PDF Full Text Request
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