Research Of Parallel Processing Technology Of Multiple Video Capture Based On FPGA

As the occupancy of vehicles growing, the occurrence of traffics increased rapidly in our country. The behavior of traffic violations should be controlled effectively. To protect the traffic safety and reduce traffic accidents, the vehicle traveling data recorder should be researched deeply. Current listing of the vehicle traveling data recorder only collects some parameters and simply data in vehicle driving. When the traffic accident occurs, it needs to use special techniques to study the collected data which is abstract and obscure. For affirming the responsibility of accident, this approach is low in efficient and it needs to be improved in accuracy.This topic, aimed at vehicle traveling data recorder system, adopts a new method of collecting image data which comes from multiple video capture system. The system realized subsystem which can capture four channel video data in the same time and has video image pre-process based on FPGA (Field Programmable Gate Array). It uses Spartan-ⅢXC3S500E of Xilinx as its central processing unit. It makes full use of the advantage of FPGA which is in abundant resources, fast processing speed, and flexible structure. It improves the speed of video capture and video image pre-process, so the performance of the system is enhanced correspondingly. In order to meet the different quality video data acquisition, the system adopts two formats of video image (CIF and D1).This article deeply studies in video acquisition technology of four channels. It makes a detailed analysis on the principle of four video capturing. The research topic unfolds the work according to the following aspects.i. Studying on video acquisition and giving a design scheme of four channels video capture and video image pre-process based on FPGA.ii. Studying on IIC bus protocol and using verilog language to controlⅡC bus to initialize the decoder chip.iii. Using the standard of BT.656 to analysis the video stream and separating Y, U, V from YUV video stream.iv. According to the problem of video buffer, the topic gives a design scheme of ping-pong operation using two SDRAM.v. Analyzing many filtering algorithms and using median filter algorithm to reduce video noise.vi. Formed two formats of video image (CIF and D1). At the end of the system, it generates suitable format for DSP chip.This research subject realizes real-time video capture, treatment and transmission. The system has many advantages, such as high real-time, small size, flexible structure, easy maintenance and easy upgrading. This design is a major part of the vehicle traveling data recorder. It uses four CCD cameras to obtain video data around the vehicle. It makes up the traditional lack of vehicle traveling data recorder. The design also improves the efficiency of traffic law enforcement and it is important for the protection of road safety.