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The Research And Design Of Video Acquisition And Preprocessing System Based On FPGA

Posted on:2015-01-17Degree:MasterType:Thesis
Country:ChinaCandidate:Z G YueFull Text:PDF
GTID:2298330467455790Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
With the development of integrated circuit technology, image processing has been widely usedin many fields of applications. The traditional image processing system is usually implemented withASIC(Application Specific Integrated Circuit) and DSP(Digital Signal Processors), and has beenlimited in some certain applications because of cost and speed. FPGA has abundant logic resourcesand can be configured flexibly, with the advantages of parallel processing and pipelining inhardware. All these accelerate the speed of image processing, and let FPGA be widely used in thefield of image processing.This paper introduces the present status of video acquisition and image processing system, andexpounds the principle of programmable logic devices. On this basis, a video capture and imagepre-processing system is designed and realized. In this system, the Altera’s FPGA chip is used asthe main processing chip and OV7670works as the image sensor chip cooperated with SDRAMmemory, which realizes video information collection, storage, display and transmission. The systemis divided into several modules according to function as follows: the reset module, video capturemodule, color space conversion module, video storage module and VGA display module. All thesemodules are realized in the FPGA chip with Verilog HDL hardware language respectively. In termsof image pre-processing, a fast median filtering algorithm is implemented on FPGA, whicheffectively eliminates the noise in image acquisition and transmission process while achieving abetter filter effect.The design not only make full use of the advantage of parallel processing and abundant logicresources of the FPGA, but also apply ping-pong operation and pipelining technology to accelerateimage processing speed. At the same time, as the FPGA is re-configurable and the Verilog HDLlanguage is portable, the system is easy to upgrade and maintain. Finally, the system is validatedand debugging, and the experimental results show that the system has lower hardware cost andpower consumption, which make it meet the functional requirements and timing requirements andhave strong market and practical value.
Keywords/Search Tags:FPGA, Video capture, Image Processing, Median Filtering
PDF Full Text Request
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