Synthesizer Design For 5GHz Wireless Local-area Network

The growing popularity of Internet demands high data rate wireless local area network. Using the unlicensed national information infrastructure (U-NII) band, wireless LAN systems can provide data rates up to several tens of megabits per second.The main purpose of this paper is to realize the frequency synthesizer for the 5GHz WLAN transceiver system. The frequency synthesizer is being used to produce the accurate local oscillator signal and to produce different centre frequency according to the channel plan. In chapter 2, the different structures of RF transceiver are discussed. It is essential to the whole performance of the raido system to choose the proper structure. The system-level analysis of the Charge Pump phase-Locked loops is elaborated on chapter 3, because Charge Pump Phase-locked loops are universally used to design radio frequency synthesizers. In chapter 4, the performance analysis of different frequency synthesizers is discussed. Consider systematically, the interger-N frequency synthesizer structure is adopted. System-level preferences, such as loop bandwidth, phase margin, strong influence the stability of pll system. Based on system-level model simulation, we determinate the key parameter of the pll system such as charge pump current, loop bandwidth, phase margin, VCO gain, divider modulus, etc.Based on system-level model simulation, the building blocks of synthesizer are designed. It is used traditional circuit structure to realize the PFD unit. One important approach had made to improve charge pump circuit by adding a feedback loop to enhance the current matching and a unity-gain buffer to reduce the current sharing. The simuation result reveals that the reference spurs of the improved method have decreased more than 20dBc than of the traditional method.The measurement is shown at last. The synthesizer works at 4.19GHz and the reference spurs achieves -49dBc.