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The Research And Design Of FPGA-Based Real Time Image Control System

Posted on:2005-03-07Degree:MasterType:Thesis
Country:ChinaCandidate:Y J LiuFull Text:PDF
GTID:2168360125450772Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Image processing is not only one of the areas of the signal and information processing science, but also one of the most active areas of computer science. With the fast development of the computer technology and integrated circuit technology, not only the algorithm and system instruct of image processing area improve fast. But also the application of image processing is improving fast. With the improvement of the PLD Large-scale integration and Super Large-Scale Integration the real time image processing improves fast also. Digital signal processing and VISI have been used in image processing area. This article describes a real time image processing system what is realized by FPGA. This project is one of the partal works of TV tracing project, and it is one of the uses of real time image processing.Based on the requests of TV tracing system, this paper analyses and summarize methods what are fit to the real image processing by refer to the information. And I design the real time image control system on the characteristics of those methods. I design the flow of the system and the direction of digital signal, and decide the chips which are used in the system. The course is that the camera takes the picture, and sends the LVDS signals. Firstly I change the LVDS signal to CMOS/TTL signals, then sends TTL signals to FPGA, which finish the pre-processing of the data and produce the synchronization signals. After that the data are send to memory, which stores the image data. Lastly the data stored in memory and the control signals are sent to D/A convert circuit at the same time, which changes the digital signals to analog signals. The analog signals are sent to the display devices. And at the same time, the image data are sent to DSP, which finishes further work. In this way I successful solve the slow speed and simply function of the traditional image collection cards.By the above course of signals processing flow, I design the hardware circuit and Printed Circuit Board and debug the PCB on structural design methods. Those works are been done by the Protel software and and the Max PlusII software, which are designed for EDA design and Altera FPGA design. What's more I realized the control in different mode and the debug work and the download the program.On hardware, I design four hardware modes to realize the function that is based on the request of real time image processing system.1, Signal change mode: Because the TTL signal can't be transmit over long distance, I use the LVDS signals when they are been sentting. I have to change the LVDS signals to TTL signals at the receive device. I designed this mode to realize the function.2, FIFO data score mode: In order to keep the sequence of the control signals what are produced by FPGA and the data what have been processed by camera, I designed this mode. It realize then sent the synchronization signals and data to D/A convert circuit at the same time. 3,D/A convert mode: In that the signals processed in FPGA are digital signals, the TV and the computer monitor are analog display devices, I have to convert the digital signals to analog signals. 4,Signals drive mode: The signals processed by FPGA have to take time before they are sent to DSP, because the TTL signals will be affects when they are sent. So I design this mode to insure the performance of the signals.In software, on based of the request of the TV tracing system, the real time image processing system can work on different modes, which are the computer monitor and the TV set. So I design two work modes, one is the write control mode of FIFO memory, the other is read control and synchronization signals produced mode. The write control mode of FIFO memory produces the reset signal of write and write clock signal and write enable signal of the FIFO memory. Other mode produces reset signal of read and read clock signal and read enable signal, and at the same time is it produces the control signals, the line synchronization signal, the field synchronization signal, the extra trigger signal, the...
Keywords/Search Tags:FPGA, ASIC, real time image processing, TV tracing.
PDF Full Text Request
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