Implementation Of Digital Image Real-time Processing System Based On FPGA

Real-time image processing technology has a wide range of applications in all aspects of social life.. The lack of processing speed is an important issue which the current real-time image processing is facing. Some programmable logic device including Field Programmable Gate Array (FPGA) having structural features of parallel trait provides a new thinking for highway image processing. The SOPC technology based on programmable chip system is the key technology. It converges parallel computing and parallel structure. It can complete real-time image processing tasks with a very high speed. Based on the analysis of various image processing system platform, the paper brings forwards an image processing system designing project which Nios II soft-core processor embedded FPGA. The system has traits of flexibility designing, simple structure, and good programmability.Using Quartus II software to design the circuit of the whole system. The dsign method of the hardware circuit is described in detail, through Verilog HDL programming realize the control to the image sensor and image memory. Make the inherent components and custom components combined to form the SOPC system, finish the image real-time Processing system on FPGA.According to the real time processing tasks, various filter algorithm was designed in image Processing module. analyze the characteristics and basic method of image processing methods, by improving the algorithm and optimizing the structure, and using of hardware resources in a reasonable condition, dig the inherent parallelism of algorithm effectively. Using the thought based on module designed to improve the processing speed of thel image processing module. Analysis and optimize the filte method for digital image, In FPGA, diversified megafunction modules which is provided by the Verilog DHL programming and Quartus II software complete some filtering algorithm such as the gray enhancing algorithm, improved median filtering algorithm, edge detection algorithm based on the Sobel arithmetic operators, sharpening disposal based on Laplacian.Make use of multiplication as little as possible to make the circuit design simple and save system resources. Because of the basic arithmetic and logical operations, it can guarantee completely the real-time of disposal.Collect one and same image, and deal with the hardware and software in FPGA separately. The results show that the use of FPGA for image processing can not only achieve good filter effects, but also its processing speed is much higher than the method processing using software. It can satisfy real-time processing requirements. At last, make a brief analysis to the consumption of system resources. It shows that the designed system satisfies the system requirements, and the resource consumption is much smaller.