The ASIC Design Of Viterbi Decoder Applied To Receiver Of GPS

Convolutional coding is a coding scheme often employed in deep space communications and recently in digital wireless communications. It offers an alternative to block codes for transmission over a noisy channel. An advantage of convolutional coding is that it can be applied to a continuous data stream as well as to blocks of data. IS-95, a wireless digital cellular standard for CDMA (code division multiple access), employs convolutional coding. A third generation wireless cellular standard adopt turbo coding, which stems from convolutional coding.There are many decoding schemes for convolutional code,such as sequence decoding algorithm,Fano algorithm,Viterbi algorithm.But in fact,what's used widely is Viterbi decoding algorithm.The Viterbi decoding algorithm, proposed in 1967 by Viterbi, is a decoding process for convolutional codes in memory-less channel,which takes full advantage of convolutional codes.Since Viterbi algorithm is proposed,it has obtained rapid development whether in theoretics or in practice and been applied to all kinds of data transmission systems,especially to digital wireless communications and deep space communications.In this thesis,we study Viterbi decoding algorithm first,and analyze the structure of Viterbi decoder,then based on them, present the front-end ASIC design of Viterbi decoder. During the course of design, Design-compiler of SYNOPSYS is applied as synthesis tool of the design, Verilog-XL of CADENCE is applied as the simulation tool. The effects of the time sequence netlist simulation of the circuit and FPGA verification indicate the correctness of the circuit design.