50MHz 8-bit Two-step A/D Convertion

Analog to Digital Converter (ADC) has been rapidly developed as interface of analog system and digital system when more and more digital equipment enter industry and our daily life. Recently abroad, research of ADC has been concentrating on high speed and high resolution, which are just the two deficiency in our country. In this dissertation we present a monolithic high-speed 8-bit CMOS A/D converter with conversion rate over 50MHz. In this design, we introduce the subranging architecture and competed coding technology, which has high conversion speed, high resolution and low power as well as overcomes the shortcomings of conventional subranging A/D such as difficult of design and fabricate. A type of high-speed voltage comparator, which is optimized using ac small-signal analysis in frequency domain, is used to improve the speed of A/D converter. The key cell and the core system of the A/D converter has been realized in 0.6um double-metal single-poly N-well CMOS process, and the chip area is 2500X2800um2. The final Hspice simulation respect of schematic shows that our high speed achieves 8-bit resolution and conversion rate over 50MHz.